STK511 Receiver Interface Board
The following table shows how the signals from the receiver connectors (U2) are routed to the microcon-
troller I/O ports. As shipped, the STK511 Receiver Interface Board routes the Receiver Application
Board signals, necessary for stand-alone operation, to the on-board microcontroller. The remaining sig-
nals are routed to the STK500 through the expansion connectors. See section “Receive Signal Routing”
on page 4-6 for additional information.
Receiver Signal to I/O Port Mapping
U2 Connector
Receiver Application Board
Microcontroller I/O
Pin #
12
11
10
9
8
7
6
5
4
3
2
1
ATA5743
VCC
GND
DATA
---
---
MODE
D_CLK
SENS
IC_Active
POL/ON
---
---
ATA5760/1
VCC
GND
DATA
---
---
V DIV
D_CLK
SENS
IC_ACTIVE
POL/ON
---
---
ATA5744
VCC
GND
DATA
---
BR0
BR1
RSSI
---
---
ENABLE
---
---
Port
---
---
PB4
---
PB1
PB3
PB2
---
PB1
PB0
---
---
4.2.2
Configuration Register DIP Switches
Upon receiving power, the receiver’s OPMODE and LIMIT registers contain default settings. Any values
other than the default require programming. The OPMODE register controls Baud Rate range, Bit Check
quantity, Modulation type, Sleep polling time, and Noise Suppression. The LIMIT register controls the
maximum and minimum valid time between edges. See the receiver datasheet for more information on
the registers.
The DIP switches on the STK511 Receiver Interface Board allow individual bits in these registers to be
modified. As an added convenience, the STK511 Receiver Interface Board contains a silkscreen legend
that specifies each bit function for both registers as well as their corresponding default value.
The configuration register DIP switches connect to the following I/O ports of the ATmega8515 AVR
microcontroller which is integral to the STK511 Receiver Interface Board. The bits not listed in the table
below are set to constants in the firmware.
Table 4-1. DIP Switch to I/O Port Mapping
OPMODE Register
Bit1
---
Bit2
---
Bit3
PD0
Bit4
PD1
Bit5
PD2
Bit6
PD3
Bit7
PD4
Bit8
PD5
Bit9
PD6
Bit10
PD7
Bit11
PC0
Bit12
PC1
Bit13
PC2
Bit14
PC3
Bit15
---
LIMIT Register
Bit1
---
Bit2
---
Bit3
PA0
Bit4
PA1
Bit5
PA2
Bit6
PA3
Bit7
PA4
Bit8
PA5
Bit9
PA6
Bit10
PA7
Bit11
PC4
Bit12
PC5
Bit13
PC6
Bit14
PC7
Bit15
---
4-4
4842B–AVR–10/09
STK511 User Guide
相关PDF资料
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